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Issue:Generalized net model of the discrete part manufacturing process of CMOS integrated circuit wafers

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Title of paper: Generalized net model of the discrete part manufacturing process of CMOS integrated circuit wafers
Author(s):
Marin Marinov
FabLess Ltd (Bulgaria)
marin.marinov@fab-less.com
Maria Stefanova-Pavlova
Center for Innovation and Technology Transfer-Global, 1000 Sofia, Gladstone street 58
maria.pavlova@mail.bg
Krassimir Atanassov
CLBME-BAS, Bulgaria
krat@bas.bg
Presented at: 4th IWGN, Sofia, 23 September 2003
Published in: Conference proceedings, pages 12—60
Download: Download-icon.png PDF (318  Kb, Info)
Keywords: Generalized nets, Integrated circuit wafers
References:
  1. Atanassov, K. Generalized Nets, World Scientific. Singapore, New Jersey, London, 1991.
  2. Atanassov, K. Intuitionistic Fuzzy Sets. Springer, Heidelberg, 1999.
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